Renesas Electronics: Senior Staff Engineer, Physical Design — Bengaluru, KA, India

About Renesas Electronics

Renesas Electronics develops semiconductors for automotive, industrial, infrastructure and connected-device applications. Its employer description identifies microcontrollers, system-on-chip devices, analogue components and power products within its portfolio. These components form part of electronic systems made by other manufacturers. Renesas also describes combining complementary products into solutions for customers, connecting individual chips with the needs of an end application. Its business therefore involves both semiconductor technology and how that technology is used in wider electronic products.

The position and its setting

Renesas Electronics lists Senior Staff Engineer, Physical Design in Bengaluru, KA, India, under reference 20032510_2026-09-02. The details below separate the work described by the employer from essential conditions, preferred experience and practical preparation advice.

• Employment type: Full-time
• Employer listing date: 22 October 2026
• Brands: Renesas Electronics

Responsibilities and work described

• Renesas has a growing presence in India with HC approaching 1000+ and significant presence with active government and university collaboration as well as OSAT footprint (JV with CG India)
• With the growing importance of India as a market (Growing semiconductor market and government goals / mandates of localization needs) and talent hub, our division’s (India for India) mission is to grow India market
• We aspire to create products (SoCs, Software, Power and Analog chips etc) which serve needs for local market
• Renesas India is seeking an experienced Staff / Senior Staff Physical Design Engineer to lead subsystem- and block-level physical implementation and closure for complex hierarchical SoCs at advanced technology nodes
• This role requires deep expertise in timing, congestion, power integrity, and clocking methodologies, along with cross-functional collaboration skills
• While this role does not own SoC-level physical design, it plays a critical role in aligning subsystem implementation with overarching SoC strategies
• Leadership: block- and subsystem-level physical design closure, including timing closure, congestion mitigation, power integrity, and overall physical implementation quality
• Collaboration: closely with SoC-level physical design teams to align on clocking strategies, floorplanning intent, and integration requirements, without direct ownership of SoC-level execution
• Apply deep understanding of clocking methodologies to ensure subsystem-level clock domains integrate cleanly into the broader SoC clock architecture
• Develop, refine, and scale subsystem closure methodologies, flows, and automation, improving predictability, quality, and execution efficiency
• Mentor and guide physical design engineers within subsystem teams, promoting best practices, technical rigor, and methodology adoption
• Work: cross-functionally with RTL design, STA, power, verification, and backend teams to ensure smooth handoffs and robust closure
• Proactively identify, assess, and mitigate physical design risks, coordinating closely with SoC teams to manage impacts and drive solutions

Essential requirements and candidate background

• 7+ years of experience in physical design, with a focus on subsystem-level closure for complex hierarchical SoCs
• Expertise in:
• Timing closure and constraint management
• Congestion analysis and resolution
• Power integrity and power-aware physical implementation
• Block and subsystem-level physical design flows
• Understanding: SoC-level floorplanning and clocking methodologies, including:
• Clock domain partitioning
• Clock tree architecture
• Skew management
• Clock gating
• (Candidate is expected to collaborate effectively at the SoC level, not lead these activities.)
• Experience: industry-standard tools such as:
• Synopsys ICC2, Fusion Compiler, PrimeTime
• Cadence Innovus, Tempus, Certus
• Signoff and analysis platforms
• Proficiency: scripting and automation using Tcl, Python, and/or Perl
• Deep knowledge of end-to-end SoC design flows, with collaboration experience across timing, power, clocking, verification, and backend teams
• Understanding: low-power design techniques and power-aware implementation methodologies
• Education

Education and qualification routes

• Degree / qualification: BTech or MTech in Electronics and Communication, Electrical Engineering, Computer Science, or a related field

Location, schedule and contract conditions

• Work arrangement: On-site
• Advertised location: Bengaluru, KA, India

Conditions requiring the complete notice

Some passages contain complex or combined conditions that have not been reduced to short eligibility statements here. Read the complete linked notice for those passages, including any alternatives, exceptions or restrictions. The concise facts above should not be treated as the full wording of every condition.

Pay and application dates

A verified salary figure is not established in this article. An online estimate for another Senior Staff Engineer, Physical Design vacancy is not an offer for reference 20032510_2026-09-02; use the employer’s own pay disclosure and recruitment communication.

A closing date is not confirmed in this article. Check the current employer page before submitting: an undated posting can change or be withdrawn.

How to apply to Renesas Electronics

Applications follow the official employer page linked below.

Open the official Renesas Electronics posting below and match the title and reference 20032510_2026-09-02.

Compare your qualifications and experience with the essential conditions for the Bengaluru, KA, India position, then read the preferred criteria separately.

Prepare an accurate CV and the supporting items requested in that employer’s application. Provide only information and documents you are authorised to share.

Use the employer’s application option, complete the required fields and review the submission. Retain the acknowledgement when one is provided. Job Alerts World does not receive the application.

Practical preparation: Python

Python work is easier to assess through a concrete example than a list of libraries. Explain the problem, the input data, the parts you implemented and how you checked the output. Include a repository or a short technical note when you can share it.

Relevant skills

• Python
• electrical engineering
• communication